Suggestion: move L1_CACHE_LINE_SIZE definition

seL4 kernel
,
1

Currently the constant L1_CACHE_LINE_SIZE (for arm) is defined in two places [1,2]:
[1] https://github.com/seL4/seL4/blob/master/include/arch/arm/arch/32/mode/machine/hardware.h
[2] https://github.com/seL4/seL4/blob/master/include/arch/arm/arch/64/mode/machine/hardware.h

Can we move it to be generated as either:

  • part of platform_gen.h
  • or as a new per-cpu family header?

I’d like to define this, and other CPU related settings, in a single place as I need to define the constant for a new CPU family that is unlikely to be merged to master (as the device tree is proprietary) and I’d prefer to keep the patches.

Thoughts? I’m happy to implement it and put a PR up but I’d like it to be consistent with the current direction of configuration in the kernel. cc @kent.mcleod

2

Could you do something like?:

if(KernelArmCortexA57)
 config_set(KernelL1CacheLineSizeBits L1_CACHE_LINE_SIZE_BITS 6)
elseif(...)
 config_set(KernelL1CacheLineSizeBits L1_CACHE_LINE_SIZE_BITS 6)
...
endif()
3

cool I’ve put up a PR here https://github.com/seL4/seL4/pull/134