# Why does seL4\_TCB\_CopyRegisters exist?

**URL:** <https://sel4.discourse.group/t/why-does-sel4-tcb-copyregisters-exist/44>\
**Category:** seL4 kernel\
**Created:** [January 14, 2019, 2:42am UTC](https://sel4.discourse.group/t/why-does-sel4-tcb-copyregisters-exist/44 "2019-01-14T02:42:55Z")\
**Posts on this page:** 2\
**Page:** 1

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**Author:** ![curtis](https://yyz2.discourse-cdn.com/free1/user_avatar/sel4.discourse.group/curtis/32/12_2.png) [@curtis](https://sel4.discourse.group/u/curtis)\
**Post date:** [January 14, 2019, 2:42am UTC](https://sel4.discourse.group/t/why-does-sel4-tcb-copyregisters-exist/44/1 "2019-01-14T02:42:55Z")

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The `seL4_TCB_CopyRegisters` provides an atomic copy of registers between two TCBs (and has a somewhat dated interface). It’s not clear in what circumstances this is necessary. This might help in situations where you want fork-like semantics without the address space copy, but there doesn’t seem to be any real justification.

The existence of this invocation does seem to have induced a bit of unnecessary complexity into the kernel.

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<div class="post-metadata">

**Author:** ![curtis](https://yyz2.discourse-cdn.com/free1/user_avatar/sel4.discourse.group/curtis/32/12_2.png) [@curtis](https://sel4.discourse.group/u/curtis)\
**Post date:** [January 14, 2019, 2:45am UTC](https://sel4.discourse.group/t/why-does-sel4-tcb-copyregisters-exist/44/2 "2019-01-14T02:45:09Z")

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In circumstances where you would want to read or write registers, there are few where this happens between two existing TCBs rather than into and out of memory (such as checkpointing).