# seL4 kernel

**URL:** https://sel4.discourse.group/c/sel4-kernel/6.md

[Latest](https://sel4.discourse.group/latest.md) · [Categories](https://sel4.discourse.group/categories.md) · [Tags](https://sel4.discourse.group/tags.md)

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## [About the seL4 kernel category](https://sel4.discourse.group/t/about-the-sel4-kernel-category/13)

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**Author:** [@anna.lyons](https://sel4.discourse.group/u/anna.lyons)\
**Replies:** 0

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Systems related seL4 discussions: kernel design decisions, how to do X with seL4, how to port seL4 to a new architecture.

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## [seL4 iMX95 support](https://sel4.discourse.group/t/sel4-imx95-support/1054)

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**Author:** [@fdelizy](https://sel4.discourse.group/u/fdelizy)\
**Replies:** 1\
**Last updated:** [May 21, 2026, 8:38pm UTC](https://sel4.discourse.group/t/sel4-imx95-support/1054 "2026-05-21T20:38:46Z")

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Hi, as part of a few projects I am working on a combination genode + sel4 on various ARM processors. So far, I got iMX8Mp boards running armstone i.MX8MP (FS-net) Verdin i.MX8MP SOM + Dahlia carreer board (Toradex) M…

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## [Planned any SpacemiT K3 SBC (e.g. K3 Pico-ITX) kernel support?](https://sel4.discourse.group/t/planned-any-spacemit-k3-sbc-e-g-k3-pico-itx-kernel-support/1040)

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**Author:** [@onlineinternaut](https://sel4.discourse.group/u/onlineinternaut)\
**Replies:** 3\
**Last updated:** [March 23, 2026, 5:30pm UTC](https://sel4.discourse.group/t/planned-any-spacemit-k3-sbc-e-g-k3-pico-itx-kernel-support/1040 "2026-03-23T17:30:22Z")

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Hi! Hope I am asking on the proper forum. It is announced that SBCs with SpacemiT K3 RISC-V CPU boards will be available on market soon. I’m just wondering whether any SBC with this CPU will be supported by the SeL4 kern…

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## [Why is seL4 compiled RelWithDebInfo by default when compiled for debugging?](https://sel4.discourse.group/t/why-is-sel4-compiled-relwithdebinfo-by-default-when-compiled-for-debugging/1020)

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**Author:** [@jhsaunders-rr](https://sel4.discourse.group/u/jhsaunders-rr)\
**Replies:** 0\
**Last updated:** [November 6, 2025, 6:37pm UTC](https://sel4.discourse.group/t/why-is-sel4-compiled-relwithdebinfo-by-default-when-compiled-for-debugging/1020 "2025-11-06T18:37:34Z")

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By default, debug builds of seL4 compiled with the standard CMake scripts are compiled with optimization on as well as debugging symbols. This has made debugging some code I’ve been working on harder than it would be if …

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## [Why not eChronos?](https://sel4.discourse.group/t/why-not-echronos/1009)

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**Author:** [@indolering](https://sel4.discourse.group/u/indolering)\
**Replies:** 6\
**Last updated:** [October 14, 2025, 11:26pm UTC](https://sel4.discourse.group/t/why-not-echronos/1009 "2025-10-14T23:26:08Z")

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The amount of security critical infrastructure that runs on single core CPUs with a MMU seems to be be very small. The world just doesn’t use a lot of single core CPUs with memory protection nowadays. Which got me thin…

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## [iMX8MM boot failure with 8GiB of memory](https://sel4.discourse.group/t/imx8mm-boot-failure-with-8gib-of-memory/991)

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**Author:** [@ZippyManaic](https://sel4.discourse.group/u/ZippyManaic)\
**Replies:** 1\
**Last updated:** [June 24, 2025, 9:23am UTC](https://sel4.discourse.group/t/imx8mm-boot-failure-with-8gib-of-memory/991 "2025-06-24T09:23:55Z")

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We have been running with seL4 12.1.0 on an iMX8MM EVK with 2GiB of memory. We have spun our own hardware and increased memory to 8GiB and up to now we’ve been running with the same memory profile as the EVK version of …

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## [Building SeL4 directly on MacOS](https://sel4.discourse.group/t/building-sel4-directly-on-macos/983)

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**Author:** [@josephg](https://sel4.discourse.group/u/josephg)\
**Replies:** 7\
**Last updated:** [May 22, 2025, 8:52am UTC](https://sel4.discourse.group/t/building-sel4-directly-on-macos/983 "2025-05-22T08:52:34Z")

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Hi everyone! I’m pretty new to building on top of SeL4. I have a m1 mac laptop. Personally I hate docker, so I figured I’d get sel4 building directly on macos instead. Well, a few hours of nonsense and I have it buildi…

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## [DKernelSkimWindow=off](https://sel4.discourse.group/t/dkernelskimwindow-off/963)

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**Author:** [@randomwalk3](https://sel4.discourse.group/u/randomwalk3)\
**Replies:** 1\
**Last updated:** [May 19, 2025, 7:06pm UTC](https://sel4.discourse.group/t/dkernelskimwindow-off/963 "2025-05-19T19:06:23Z")

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Hi, I am testing sel4bench on real x86 board now. I found that if we use parameter DKernelSkimWindow=off, we can see nothing on the uart. Can anyone give me any advice.

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## [Sel4bench is not working for me on x86\_64](https://sel4.discourse.group/t/sel4bench-is-not-working-for-me-on-x86-64/204)

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**Author:** [@curten42](https://sel4.discourse.group/u/curten42)\
**Replies:** 4\
**Last updated:** [April 13, 2025, 10:21am UTC](https://sel4.discourse.group/t/sel4bench-is-not-working-for-me-on-x86-64/204 "2025-04-13T10:21:10Z")

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Hi I’m trying to run the sel4bench. I followed the instructions over at https://github.com/seL4/sel4bench-manifest . The only difference is that I’m trying to run it on the x86\_64 platform as such: ../init-build.sh -D…

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## [Running seL4 on bare-metal x86\_64 PC](https://sel4.discourse.group/t/running-sel4-on-bare-metal-x86-64-pc/934)

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**Author:** [@Syed\_Aftab](https://sel4.discourse.group/u/Syed_Aftab)\
**Replies:** 1\
**Last updated:** [April 13, 2025, 10:17am UTC](https://sel4.discourse.group/t/running-sel4-on-bare-metal-x86-64-pc/934 "2025-04-13T10:17:18Z")

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Hi, I am very new to sel4 and I am trying to run it bare-metal on an Intel Xeon x86\_64 machine. I am following the instructions here PC99 | seL4 docs. I can run seL4 using the ./simulate script which runs the kernel un…

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## [Issue with seL4 & ARMv8 config for MMU](https://sel4.discourse.group/t/issue-with-sel4-armv8-config-for-mmu/940)

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**Author:** [@Misbah](https://sel4.discourse.group/u/Misbah)\
**Replies:** 29\
**Last updated:** [February 28, 2025, 11:52am UTC](https://sel4.discourse.group/t/issue-with-sel4-armv8-config-for-mmu/940 "2025-02-28T11:52:36Z")

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Dear Community members, I have used maaxboard bsp in amother armv8 cortex-a53 processor (same as maaxboard) & facing below issue specially related to mmu: In the elfloader crt0.s file if i add the below code to disab…

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## [seL4bench test getting stuck at ((init\_arm\_kernel\_t)kernel\_info.virt\_entry)](https://sel4.discourse.group/t/sel4bench-test-getting-stuck-at-init-arm-kernel-t-kernel-info-virt-entry/904)

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**Author:** [@Init\_vishal](https://sel4.discourse.group/u/Init_vishal)\
**Replies:** 4\
**Last updated:** [January 20, 2025, 11:38am UTC](https://sel4.discourse.group/t/sel4bench-test-getting-stuck-at-init-arm-kernel-t-kernel-info-virt-entry/904 "2025-01-20T11:38:57Z")

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Dear seL4 community members, I am trying to run seL4bench for Arm 53 Core platform, but it is getting stuck. Whereas, I am able to run seL4test application with the same ELF-loader & seL4 Microkernel which just boots f…

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## [Running helloworld project build in release mode on ARMV8 Hardware hangs while loading kernel Image](https://sel4.discourse.group/t/running-helloworld-project-build-in-release-mode-on-armv8-hardware-hangs-while-loading-kernel-image/938)

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**Author:** [@Init\_vishal](https://sel4.discourse.group/u/Init_vishal)\
**Replies:** 1\
**Last updated:** [January 17, 2025, 10:25am UTC](https://sel4.discourse.group/t/running-helloworld-project-build-in-release-mode-on-armv8-hardware-hangs-while-loading-kernel-image/938 "2025-01-17T10:25:20Z")

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Dear seL4 community members, I am trying to run helloworld project build in release mode(Image size: 500K) on AVNET MaaxBoard based on ARMv8/Cortex-A53 which is a seL4 supported platform, but it is getting stuck at “Ju…

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## [SMP on QEMU is failing](https://sel4.discourse.group/t/smp-on-qemu-is-failing/916)

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**Author:** [@jyothigo](https://sel4.discourse.group/u/jyothigo)\
**Replies:** 2\
**Last updated:** [November 4, 2024, 6:15am UTC](https://sel4.discourse.group/t/smp-on-qemu-is-failing/916 "2024-11-04T06:15:34Z")

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Getting below error while enabling smp on Qemu HVS not supported for PSCI falied to boot cpu 0x1: 18446744073709551615 abort() called command used: …/init-build.sh -DPLATFORM=qemu-arm-virt -DAARCH64=1 -DSMP=1 -DNUM\_NOD…

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## [Debugging seL4 elfloader using lauterbach failed to step into c code](https://sel4.discourse.group/t/debugging-sel4-elfloader-using-lauterbach-failed-to-step-into-c-code/921)

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**Author:** [@anishkhannayellapu](https://sel4.discourse.group/u/anishkhannayellapu)\
**Replies:** 3\
**Last updated:** [November 4, 2024, 9:14am UTC](https://sel4.discourse.group/t/debugging-sel4-elfloader-using-lauterbach-failed-to-step-into-c-code/921 "2024-11-04T09:14:00Z")

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Hi Team, Setup: seL4 Version : 13 Debugging: Debugging ELFloader code Platform: arm64 Build Type: CMAKE\_BUILD\_TYPE:STRING=Debug I have compiled the seL4 for arm64 based hardware and able to run seL4 kernel from elf…

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## [seL4 support for multicore fails to boot CPU 0x1:18446744073709551615 on ARM QEMU](https://sel4.discourse.group/t/sel4-support-for-multicore-fails-to-boot-cpu-0x1-18446744073709551615-on-arm-qemu/912)

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**Author:** [@Init\_vishal](https://sel4.discourse.group/u/Init_vishal)\
**Replies:** 1\
**Last updated:** [October 30, 2024, 10:59pm UTC](https://sel4.discourse.group/t/sel4-support-for-multicore-fails-to-boot-cpu-0x1-18446744073709551615-on-arm-qemu/912 "2024-10-30T22:59:20Z")

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Dear seL4 community members, I am trying to build and test multicore using seL4 on ARM QEMU setup but it fails to boot as below : :~/sel4armsetup/build-arm-virt$ ./simulate ./simulate: QEMU command: qemu-system-aarch64…

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## [Request to map a specific physical address from a userspace application](https://sel4.discourse.group/t/request-to-map-a-specific-physical-address-from-a-userspace-application/655)

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**Author:** [@mskordal](https://sel4.discourse.group/u/mskordal)\
**Replies:** 3\
**Last updated:** [October 30, 2024, 10:48pm UTC](https://sel4.discourse.group/t/request-to-map-a-specific-physical-address-from-a-userspace-application/655 "2024-10-30T22:48:38Z")

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I have managed to boot sel4 on ZCU102 using the instructions from the following link: https://docs.sel4.systems/Hardware/ZCU102.html I want to map a specific physical address into a userspace application. The addresses…

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## [seL4test for Multicore scenario give error but test passes on x86 QEMU setup](https://sel4.discourse.group/t/sel4test-for-multicore-scenario-give-error-but-test-passes-on-x86-qemu-setup/913)

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**Author:** [@Init\_vishal](https://sel4.discourse.group/u/Init_vishal)\
**Replies:** 1\
**Last updated:** [October 30, 2024, 12:43pm UTC](https://sel4.discourse.group/t/sel4test-for-multicore-scenario-give-error-but-test-passes-on-x86-qemu-setup/913 "2024-10-30T12:43:51Z")

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Dear seL4 community member , I am running seL4test for multicore onx86 QEMU setup, it was observed that it through error of “Failed to set tcb affinity” but test passes as below , so we are not able to understand what…

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## [Kernel triple fault when retyping untyped memory on x86 qemu](https://sel4.discourse.group/t/kernel-triple-fault-when-retyping-untyped-memory-on-x86-qemu/874)

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**Author:** [@FennelFoxxo](https://sel4.discourse.group/u/FennelFoxxo)\
**Replies:** 6\
**Last updated:** [September 5, 2024, 2:38pm UTC](https://sel4.discourse.group/t/kernel-triple-fault-when-retyping-untyped-memory-on-x86-qemu/874 "2024-09-05T14:38:37Z")

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Hi all! I’ve just started messing with seL4, and I’m currently trying to allocate objects from untyped memory passed to the rootserver. However, I’ve noticed that when I call seL4\_Untyped\_Retype on a specific untyped me…

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## [Bootelf vs elfloader with respect to SEL4](https://sel4.discourse.group/t/bootelf-vs-elfloader-with-respect-to-sel4/856)

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**Author:** [@anishkhannayellapu](https://sel4.discourse.group/u/anishkhannayellapu)\
**Replies:** 2\
**Last updated:** [August 26, 2024, 10:13am UTC](https://sel4.discourse.group/t/bootelf-vs-elfloader-with-respect-to-sel4/856 "2024-08-26T10:13:18Z")

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Hi Team, I have started working on SEL4, porting to a latest ARM64 based hardware. In majority of hardware’s using bootelf or bootm. Now i want to understand when using bootelf, which is uboot elfloader. Still we need …

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## [Running seL4 on a BeagleV-Fire](https://sel4.discourse.group/t/running-sel4-on-a-beaglev-fire/814)

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**Author:** [@dvd2792](https://sel4.discourse.group/u/dvd2792)\
**Replies:** 7\
**Last updated:** [May 3, 2024, 8:32pm UTC](https://sel4.discourse.group/t/running-sel4-on-a-beaglev-fire/814 "2024-05-03T20:32:17Z")

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Hello guys, last week I received the BeagleV-Fire, which contains the Microchip’s Polarfire MPFS025T SoC. I’ve tried to run seL4 but I got stuck in here: Someone has tried or has some advice for me? Thanks

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## [Plic\_init\_controller second loop controlling expression could cause crash](https://sel4.discourse.group/t/plic-init-controller-second-loop-controlling-expression-could-cause-crash/819)

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**Author:** [@Jack.Chen](https://sel4.discourse.group/u/Jack.Chen)\
**Replies:** 1\
**Last updated:** [February 20, 2024, 10:10am UTC](https://sel4.discourse.group/t/plic-init-controller-second-loop-controlling-expression-could-cause-crash/819 "2024-02-20T10:10:42Z")

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The second loop in plic\_init\_controller (kernel/include/drivers/irq/riscv\_plic0.h) intends to set an initial priority for each PLIC IRQ, but with the controlling expression i \<= PLIC\_MAX\_IRQ + 1, it sets priority for 1 e…

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## [seL4test get stuck in FPU0001 test on qemu-arm-virt with givc3 enable](https://sel4.discourse.group/t/sel4test-get-stuck-in-fpu0001-test-on-qemu-arm-virt-with-givc3-enable/772)

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**Author:** [@colorglass](https://sel4.discourse.group/u/colorglass)\
**Replies:** 3\
**Last updated:** [January 26, 2024, 11:39am UTC](https://sel4.discourse.group/t/sel4test-get-stuck-in-fpu0001-test-on-qemu-arm-virt-with-givc3-enable/772 "2024-01-26T11:39:43Z")

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HI, I’m recently doing some works on a platform with gicv3, and I decide to run some tests on the qemu arm platform for better debugging. The default qemu configuration sets gicv2 as the default IRQ controller. So I mod…

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## [Using "new threads" with seL4](https://sel4.discourse.group/t/using-new-threads-with-sel4/789)

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**Author:** [@anon90145806](https://sel4.discourse.group/u/anon90145806)\
**Replies:** 0\
**Last updated:** [November 7, 2023, 11:29am UTC](https://sel4.discourse.group/t/using-new-threads-with-sel4/789 "2023-11-07T11:29:51Z")

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Hello. In the course about seL4 in lecture 3a the advantages and disadvantages of threads and events are being discussed. The conclusion is that some kind of “new threads” should be researched which could be more perform…

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## [Assertion failure in create\_initial\_thread during kernel boot on new platform](https://sel4.discourse.group/t/assertion-failure-in-create-initial-thread-during-kernel-boot-on-new-platform/743)

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**Author:** [@eleanor](https://sel4.discourse.group/u/eleanor)\
**Replies:** 3\
**Last updated:** [August 10, 2023, 6:16am UTC](https://sel4.discourse.group/t/assertion-failure-in-create-initial-thread-during-kernel-boot-on-new-platform/743 "2023-08-10T06:16:35Z")

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I’m trying to get seL4 running on an NVIDIA Jetson Nano and trying to get the stock sel4test project running as a first step. The Nano is very similar to the TX1 (they use the same TRM but the Linux device trees appear t…

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## [Using clangd for seL4 development](https://sel4.discourse.group/t/using-clangd-for-sel4-development/723)

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**Author:** [@robert.vanvossen](https://sel4.discourse.group/u/robert.vanvossen)\
**Replies:** 0\
**Last updated:** [June 26, 2023, 7:38pm UTC](https://sel4.discourse.group/t/using-clangd-for-sel4-development/723 "2023-06-26T19:38:04Z")

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Wrote a blog on using clangd with seL4 during development. This is an LSP that ties into editors to allow for functionality like inline documentation, go to definition, go to reference, autocomplete, etc. https://dorner…

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## [Why is "halt" defined with the "noinline" function attribute?](https://sel4.discourse.group/t/why-is-halt-defined-with-the-noinline-function-attribute/699)

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**Author:** [@Jack.Chen](https://sel4.discourse.group/u/Jack.Chen)\
**Replies:** 3\
**Last updated:** [April 24, 2023, 3:17am UTC](https://sel4.discourse.group/t/why-is-halt-defined-with-the-noinline-function-attribute/699 "2023-04-24T03:17:18Z")

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Why is halt (kernel/src/arch/arm/64/idle.c) defined with the \_\_attribute\_\_((noinline)) function attribute? I don’t see a problem with inlining this function.

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## [UnknownSyscall Exception Handler for non-seL4 syscall API](https://sel4.discourse.group/t/unknownsyscall-exception-handler-for-non-sel4-syscall-api/672)

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**Author:** [@lukas.graber](https://sel4.discourse.group/u/lukas.graber)\
**Replies:** 7\
**Last updated:** [March 1, 2023, 5:17pm UTC](https://sel4.discourse.group/t/unknownsyscall-exception-handler-for-non-sel4-syscall-api/672 "2023-03-01T17:17:11Z")

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Hello, I was posting on the mailing list just before, not sure if this here is necessary or if I should have posted here in the first place. I am working on a Linux-like syscall handler in user-space and want to impleme…

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## [Comparing Xen and SeL4 (QubesOS)](https://sel4.discourse.group/t/comparing-xen-and-sel4-qubesos/667)

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**Author:** [@bluesteal](https://sel4.discourse.group/u/bluesteal)\
**Replies:** 1\
**Last updated:** [February 6, 2023, 10:20pm UTC](https://sel4.discourse.group/t/comparing-xen-and-sel4-qubesos/667 "2023-02-06T22:20:29Z")

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How does SeL4 compare with a hypervisor like Xen? Does it have a smaller attack surface? What would it take to replace Xen with SeL4 as part of QubesOS?

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## [Running seL4 on a Pi4 b](https://sel4.discourse.group/t/running-sel4-on-a-pi4-b/498)

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**Author:** [@Amol](https://sel4.discourse.group/u/Amol)\
**Replies:** 1\
**Last updated:** [February 3, 2023, 1:47am UTC](https://sel4.discourse.group/t/running-sel4-on-a-pi4-b/498 "2023-02-03T01:47:48Z")

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Hi, I’ve been trying to lean more about seL4. I have been trying to get the sel4test-driver image to run on a Raspberry pi 4 b and following along the How to but this fails to load the kernel. If i do an ls I can see …

[Next page](https://sel4.discourse.group/c/sel4-kernel/6.md?page=1)
